Two-Klystron Binary Pulse Compression at SLAC*

The Binary Pulse Compression system installed at SLAC was tested using two klystrons, one with 10 MW and the other with 34 MW output. By compressing 56@ ns klystron pulses into 70 ns, the measured BPC output wss 175 MW, limited by the available power from the two klystrons. This output was used to provide 10GMW input to a 36cell X-band structure in which a lOO-MV/m gradient was obtained. This system, using the higher klystron outputs expected in the future has the potential to deliver the 350 MW needed to obtain 100 MV/m gradients in the 1.8-m NLC prototype structure. This note describes the timing, triggering, and phase coding used in the two klystron experiment, and the expected and measured network response to threeor twostage modulation. INTRODUCTION The Binary Pulse Compression (BPC) system PI consists of a BPC network and its appropriately modulated drive. A BPC network consists of one or more stages. Each stage consists of a hybrid whose two isolated ports are used as inputs and the remaining two ports as outputs with one output port followed by a delay line. The delays decrease in a binary fashion, with the last delay equal to the output pulse width. Because more klystrons became available, the oneklystron BPC [2] was converted into the standard twoklystron, BPC system. The systen consists of a bstage BPC network, followed by a combiner, with its klystron drive and its load, and is shown in Fig. 1. If, and only if, the two input powers are equal, does a switchable 7r phase-shift (PSK) direct all of the input powers into one or into the other output port of each hybrid. But, ss we shall now show, the deviation from this ideal is small even for large input power ratios. Using superpo sition and energy conservation one can show that the two output powers of a hybrid in terms of its two input powers are P..=~+$+&&mp. (1) (2) Here, 4 is the phase difference between the input fields. We adjust the phase shifters so that 4 = 0.0“. Then p-z [~+g$ PO*= [/&pg]’ .